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ISBN: 9781461544111
History of the Book The last three decades have witnessed an explosive development in integrated circuit fabrication technologies.The complexities of cur- rent CMOS circuits are reaching … Mehr…
Baris Taskin, Eby G. Friedman, Ivan S. Kourtev:
Timing Optimization Through Clock Skew Scheduling - neues BuchISBN: 9781461544111
History of the Book The last three decades have witnessed an explosive development in integrated circuit fabrication technologies. The complexities of cur- rent CMOS circuits are reaching… Mehr…
ISBN: 9781461544111
*Timing Optimization Through Clock Skew Scheduling* / pdf eBook für 96.49 € / Aus dem Bereich: eBooks, Sachthemen & Ratgeber, Technik Medien > Bücher nein eBook als pdf eBooks > Sachtheme… Mehr…
ISBN: 9781461544111
Timing Optimization Through Clock Skew Scheduling: ab 96.49 € eBooks > Sachthemen & Ratgeber > Technik Springer New York, Springer New York
ISBN: 9781461544111
Timing Optimization Through Clock Skew Scheduling: ab 96.49 € eBooks > Sachthemen & Ratgeber > Technik Springer US eBook als pdf, Springer US
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Detailangaben zum Buch - Timing Optimization Through Clock Skew Scheduling
EAN (ISBN-13): 9781461544111
Erscheinungsjahr: 12
Herausgeber: Springer US
Buch in der Datenbank seit 2016-01-09T00:56:34+01:00 (Berlin)
Detailseite zuletzt geändert am 2023-09-18T22:06:21+02:00 (Berlin)
ISBN/EAN: 9781461544111
ISBN - alternative Schreibweisen:
978-1-4615-4411-1
Alternative Schreibweisen und verwandte Suchbegriffe:
Autor des Buches: friedman, eby, boyer
Titel des Buches: scheduling
Daten vom Verlag:
Autor/in: Ivan S. Kourtev; Eby G. Friedman; Baris Taskin
Titel: Timing Optimization Through Clock Skew Scheduling
Verlag: Springer; Springer US
194 Seiten
Erscheinungsjahr: 2012-12-06
New York; NY; US
Sprache: Englisch
96,29 € (DE)
99,00 € (AT)
118,00 CHF (CH)
Available
XXI, 194 p.
EA; E107; eBook; Nonbooks, PBS / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; CMOS; Potential; Signal; Technologie; VLSI; algorithms; circuit; computer; computer-aided design (CAD); design; development; history; integrated circuit; optimization; transistor; C; Electronic Circuits and Systems; Electrical and Electronic Engineering; Computer-Aided Engineering (CAD, CAE) and Design; Engineering; Elektrotechnik; Computer-Aided Design (CAD); BC
1. Introduction.- 2. VLSI Systems.- 2.1 Signal Representation.- 2.2 Synchronous VLSI Systems.- 2.3 The VLSI Design Process.- 2.4 Summary.- 3. Signal Delay In Vlsi Systems.- 3.1 Delay Metrics.- 3.2 Devices and Interconnections.- 4. Timing Properties Of Synchronous Systems.- 4.1 Storage Elements.- 4.2 Latches.- 4.3 Parameters of Latches.- 4.4 Flip-Flops.- 4.5 Parameters of Flip-Flops.- 4.6 The Clock Signal.- 4.7 Single-Phase Path with Flip-Flops.- 4.8 Single-Phase Path with Latches.- 4.9 A Final Note.- 5. Clock Scheduling and Clock Tree Synthesis.- 5.1 Background.- 5.2 Definitions and Graphical Model.- 5.3 Clock Scheduling.- 5.4 Structure of the Clock Distribution Network.- 5.5 Solution of the Clock Tree Synthesis Problem.- 5.6 Software Implementation.- 6. Clock Scheduling For Improved Reliability.- 6.1 Problem Formulation.- 6.2 Derivation of the QP Algorithm.- 7. Practical Considerations.- 7.1 Computational Analysis.- 7.2 Unconstrained Basis Skews.- 7.3 I/O Registers and Target Delays.- 8. Experimental Results.- 8.1 Description of Computer Implementation.- 8.2 Graphical Illustrations of Results.- 9. Conclusions.- 10. Future Directions.- 10.1 Algorithmic Enhancements.- 10.2 Practical Considerations.- References.- Appendices.- A- Numerical Illustration of Algorithms.- A.1 Algorithm LMCS-1.- A.2 Algorithm LMCS-2.- A.3 Algorithm CSD.- B- Glossary of Terms.- C- Graphical Illustration of Results.- About the Authors.Weitere, andere Bücher, die diesem Buch sehr ähnlich sein könnten:
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